The present disclosure relates to through-substrate shielding, and in particular to providing a conductive wall between a through-substrate via and semiconductor elements to prevent the through-substrate via from influencing the semiconductor elements.
In three-dimensional (3D) integration of semiconductor devices, one semiconductor chip may be stacked on top of another. For example, one semiconductor chip may be stacked on one side of a substrate and another on an opposite side. In addition, multiple semiconductor chips may be stacked together without a substrate, multiple substrates may be provided, etc. Semiconductor chips are able to communicate with each other or receive power by way of vias extending through insulating substrates. Through-substrate vias, which may also be referred to as through-silicon vias or TSVs, extend through a substrate from one surface of a chip or substrate to an opposite surface.
While TSVs allow for increased 3D integration of semiconductor chips and devices, one effect of TSVs is that as current flows through a TSV it may couple to semiconductor devices in the substrate through which the TSV passes. Consequently, noise and other interference may hinder the operation of the semiconductor devices.